AMD 上海研发中心招聘 ASIC design verification engineer

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AMD 上海研发中心招聘 ASIC design verification engineer
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3 S/ y2 R- ~2 P* E  dMTS/Sr. ASIC Engineer:
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2 h' [8 A4 `9 B/ |, g% BPosition Summary
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- Participate IP and SoC level architecture definition, derive functional and design specifications and analyze feasibility of technical and architectures.
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8 Z& i% r% Q: b* b/ ^" h! a7 C+ f- Implement design with Verilog to achieve specification goals. Simulate and debug the codes in coding stage.

1 I4 C8 X9 E4 D8 Z- C( P- Go through the FE design flow to deliver qualified netlist. Feedback to Physical Design team to help to close timing and check floorplan.
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- Write ASIC specific part of test plan. Prove functional correctness from block level to SoC level

+ g  d9 l- o6 k8 c- Support FW/SW bring-up and debugging

- Working as the technical point of contact on the ASIC area.

, x4 m4 K1 E0 T, f6 {3 _6 x( i- Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency.

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Essential Functions:
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1 R& ?- E- A5 [$ dRTL, Verification, Testbench, SystemC, SystemVerilog, OVM

Essential Requirements/Qualifications:
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- Proven ASIC / SoC Design / Verification Experience

  K2 u: W/ @1 d- Must have strong background on IP development

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Desired:

9 B' q; b: F- I, b  v, S9 A- Major in EE & CS
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- Must be proficient in Verilog coding, debugging and modeling

: a" I  q# `- a: |1 o9 C- Should be familiar with Advanced C/C++/SystemVerilog, RTL coding techniques.

8 O( n' v  ]( L- PCIe, BIOS, ACPI experience would be an asset.

- Must be familiar with Design for verification Methodology (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)

" e2 A3 w& C4 |9 j9 p( z# x- Should be familiar with ASIC design flow, such as synthesis, DFT, timing analysis, ECO etc.
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% @" i$ q" ~+ V4 e) b$ }# G- Must be familiar with shell/perl/tcl programming in linux OS.

- Should have strong problem solving skills
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- Good English hearing, speaking, reading and writing capabilities.
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2 ]) K+ N/ l# ~0 ~9 s- |- Good communication skills
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- Will be a big plus if having mass production tape‐out experience.
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