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[招聘] AMD 上海研发中心招聘 ASIC design verification engineer

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发表于 2011-6-30 10:27 | 显示全部楼层 |阅读模式
AMD 上海研发中心招聘 ASIC design verification engineer
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MTS/Sr. ASIC Engineer:
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% y% j' f( u: Q9 @( h0 B* h$ SPosition Summary
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' Q( S% x# V' v- m% P+ d5 G# X0 e1 l- Participate IP and SoC level architecture definition, derive functional and design specifications and analyze feasibility of technical and architectures.
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6 ?5 [- B- O2 T6 E- X" s- Implement design with Verilog to achieve specification goals. Simulate and debug the codes in coding stage.' R' B3 A; y& F4 `& ?

1 ?' j. A2 T& q) M/ ^/ U% n/ F9 ^- Go through the FE design flow to deliver qualified netlist. Feedback to Physical Design team to help to close timing and check floorplan.% c+ A) K+ {5 Y# H3 r" A4 M

3 N) P% ]5 G$ U  p7 R4 E- Write ASIC specific part of test plan. Prove functional correctness from block level to SoC level
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- Support FW/SW bring-up and debugging
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- Working as the technical point of contact on the ASIC area.7 \# \6 L, o' q0 F- O6 ~, A6 I

% @/ e0 F! i& D8 Z4 ]2 Z4 }- Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency.
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Essential Functions:
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RTL, Verification, Testbench, SystemC, SystemVerilog, OVM" H* q1 O1 Z% U0 p
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Essential Requirements/Qualifications:
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" O+ q! c0 m1 s1 v- Proven ASIC / SoC Design / Verification Experience
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- Must have strong background on IP development1 i" B" G' O+ A  g7 G) V! @0 i: f: ^

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4 H/ o0 T* r/ d# r# \5 B1 KDesired:
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* w! ^, ]9 A" B0 I8 p, z* J2 a- Major in EE & CS
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- Must be proficient in Verilog coding, debugging and modeling% r( [& @/ u. F8 B" c& J4 i: q

) q, @; L' H+ B' q  |- Should be familiar with Advanced C/C++/SystemVerilog, RTL coding techniques.
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- PCIe, BIOS, ACPI experience would be an asset./ J$ f  r/ u! {  ~

. E  t% H! O( l% Y- B- Must be familiar with Design for verification Methodology (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)
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- Should be familiar with ASIC design flow, such as synthesis, DFT, timing analysis, ECO etc.; P; n% r  x( R4 ^) [. H- k
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- Must be familiar with shell/perl/tcl programming in linux OS.9 c, \+ t' F2 j! c
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- Should have strong problem solving skills1 C, |& V0 v2 u1 b- n# a

2 }. |( }0 r) e- Good English hearing, speaking, reading and writing capabilities.
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- Good communication skills
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! Q( w# ]2 x. [! u* e- Will be a big plus if having mass production tape‐out experience.- t. d+ _3 O$ U0 V7 C
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简历投递:http://bbs.aftjob.com/thread-608678-1-1.html
! p2 U; C/ f" h" JAMD求职俱乐部:http://bbs.aftjob.com/group-60-1.html
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