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AMD 上海研发中心招聘 ASIC design verification engineer _ L# e, L! V P% A4 e% V
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( F u" h, f; f! ^# {( ]MTS/Sr. ASIC Engineer:, ~* U2 q+ V/ n p6 ?; }& X9 \- u; q7 f
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8 q6 V9 Y) Y8 h; ]Position Summary
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- Participate IP and SoC level architecture definition, derive functional and design specifications and analyze feasibility of technical and architectures.8 h/ T5 P2 c. o
$ {8 n7 Q7 A m& H9 t6 @- Implement design with Verilog to achieve specification goals. Simulate and debug the codes in coding stage.9 E- I* A( ^' T2 \) I% a5 e5 E
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- Go through the FE design flow to deliver qualified netlist. Feedback to Physical Design team to help to close timing and check floorplan.: a: H: o. h/ F) Z# u H4 a \
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- Write ASIC specific part of test plan. Prove functional correctness from block level to SoC level. Q* z; N' ^+ ~3 f: e' D+ |: X
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- Support FW/SW bring-up and debugging
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$ h$ @- g& `7 O* t# G" }- Working as the technical point of contact on the ASIC area.
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. u, \ {3 u9 I: v$ N+ e( D- Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency.
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, `) {* j+ A2 n, Y! D) i& J. nEssential Functions:! N5 e) n% m, L* Y2 h
( j ^4 t7 j w. ?RTL, Verification, Testbench, SystemC, SystemVerilog, OVM
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Essential Requirements/Qualifications:: ~+ D7 Q$ Q1 [3 v4 {
; u4 H b" w* ?' f- Proven ASIC / SoC Design / Verification Experience
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* \* G% R! {; g6 u. _& V9 L- Must have strong background on IP development
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8 M- @/ m) H& V0 H* F9 D( XDesired:4 ]* w# I B5 d" R4 A5 j: Z
1 C1 E' V7 n4 m( i- Major in EE & CS2 q I1 }, |$ ^0 D: }0 m
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- Must be proficient in Verilog coding, debugging and modeling
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- Should be familiar with Advanced C/C++/SystemVerilog, RTL coding techniques." |1 e: b" u2 ^- v- V( N. b
" I6 n2 T: }6 s- PCIe, BIOS, ACPI experience would be an asset.
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: s. C$ O2 }6 l, B2 D- Must be familiar with Design for verification Methodology (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)+ @* K, Z8 A4 d8 C
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- Should be familiar with ASIC design flow, such as synthesis, DFT, timing analysis, ECO etc.4 x+ p n! n3 H4 e( I+ ?% {, Z- a) k
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- Must be familiar with shell/perl/tcl programming in linux OS.% d( B$ f) U# Z3 E9 M
8 ]2 G, U* P8 V$ |* `1 j6 V! X6 d- Should have strong problem solving skills
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- Good English hearing, speaking, reading and writing capabilities.
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- Good communication skills- S# h/ e$ f/ |# F/ Q5 h
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- Will be a big plus if having mass production tape‐out experience.
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2 Y. ~! e4 l; n0 ^) kAMD求职俱乐部:http://bbs.aftjob.com/group-60-1.html |
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