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AMD 上海研发中心招聘 ASIC design verification engineer! x8 a3 v$ i7 I
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MTS/Sr. ASIC Engineer:
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d% Q. u( R4 w! I; h: @; IPosition Summary
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- Participate IP and SoC level architecture definition, derive functional and design specifications and analyze feasibility of technical and architectures.2 ?, e3 v; _& ?
: J7 ^* Y$ G; C- Implement design with Verilog to achieve specification goals. Simulate and debug the codes in coding stage.
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- q2 E& U4 I2 r& A- Go through the FE design flow to deliver qualified netlist. Feedback to Physical Design team to help to close timing and check floorplan.
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* r/ n" K. i! c9 j- Write ASIC specific part of test plan. Prove functional correctness from block level to SoC level
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+ z/ }4 e2 f4 B' f0 [5 i; t: B- Support FW/SW bring-up and debugging
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- Working as the technical point of contact on the ASIC area.! }" n! W9 Q0 L+ k5 v- n, t# O$ ~
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- Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency.
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3 m/ f- P- h- B6 _- P# WEssential Functions:6 s$ z0 }/ S. v! k6 S
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RTL, Verification, Testbench, SystemC, SystemVerilog, OVM3 ^8 y4 Y! C$ t) r
9 }% d/ `' e2 x* tEssential Requirements/Qualifications: v$ A* Y- j! n4 d: ?
0 t2 s. k3 V! @- Proven ASIC / SoC Design / Verification Experience) _! ~% u* f- T0 ]8 c
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- Must have strong background on IP development! q5 L6 l U: l \" Z ?
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# k8 J2 E. U1 v, YDesired:9 @) }$ W1 v& f" W
6 M6 D& s/ l4 \2 f! G: e: x- Major in EE & CS; c# P' s* v6 G2 H. Y
7 }' L" @7 W$ Z: q, ]7 _+ v4 O- Must be proficient in Verilog coding, debugging and modeling
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- Should be familiar with Advanced C/C++/SystemVerilog, RTL coding techniques.. K& o( V% l$ k
# H6 t$ T8 O9 g- Q% J- PCIe, BIOS, ACPI experience would be an asset.* ^# l& o+ Q4 w+ G6 G: V! T
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- Must be familiar with Design for verification Methodology (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)6 s- ~5 S, d O) I8 s8 V; Y
; e( ^9 ^9 [3 O$ Z U4 y- Should be familiar with ASIC design flow, such as synthesis, DFT, timing analysis, ECO etc., a- L' C+ T5 r, Q: I" C2 ^. _
- _$ k% t1 g2 G5 @1 A" H- Must be familiar with shell/perl/tcl programming in linux OS.
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/ n2 Q9 z6 X3 J" |/ D! r# Z- Should have strong problem solving skills
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- Good English hearing, speaking, reading and writing capabilities.
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8 |6 y$ j* O3 }2 ~! s6 T! f$ U( z- Good communication skills5 G3 v* B$ `& f" R
m/ n7 C1 D; P0 q+ I+ ~ O- Will be a big plus if having mass production tape‐out experience.* D% F4 u1 K0 {6 h* }
4 K- [( p9 p+ A, a* c) ], A简历投递:http://bbs.aftjob.com/thread-608678-1-1.html
W6 t! H( s3 W- I6 v0 ]AMD求职俱乐部:http://bbs.aftjob.com/group-60-1.html |
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