AMD 上海研发中心招聘 ASIC design verification engineer

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AMD 上海研发中心招聘 ASIC design verification engineer
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职位要求:


: D+ R3 u5 w  V: }) \AMD 上海研发中心招聘 ASIC design verification engineer

MTS/Sr. ASIC Engineer:
  
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) }4 x7 @& y. W1 [Position Summary

$ A1 ~$ E0 X3 m& D- a- Participate IP and SoC level architecture definition, derive functional and design specifications and analyze feasibility of technical and architectures.

- Implement design with Verilog to achieve specification goals. Simulate and debug the codes in coding stage.

- Go through the FE design flow to deliver qualified netlist. Feedback to Physical Design team to help to close timing and check floorplan.

- Write ASIC specific part of test plan. Prove functional correctness from block level to SoC level

/ V5 C( x4 u% v- U7 \9 W- Support FW/SW bring-up and debugging

- Working as the technical point of contact on the ASIC area.

. t- j: w) d0 X9 S0 p- Maintain design environment, solve flow issues, and develop scripts to improve flow efficiency.


Essential Functions:

RTL, Verification, Testbench, SystemC, SystemVerilog, OVM

3 W* D+ P5 x) ~1 ~  DEssential Requirements/Qualifications:
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) e+ i, W1 Q- P9 d% N+ ?2 q- Proven ASIC / SoC Design / Verification Experience
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- Must have strong background on IP development
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Desired:
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+ ^& i" j3 C: G/ `1 Z& J9 }" `0 ^7 z' f- Major in EE & CS

7 M% T" H% b7 C# y3 _, q0 `- Must be proficient in Verilog coding, debugging and modeling

- Should be familiar with Advanced C/C++/SystemVerilog, RTL coding techniques.
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3 f. w$ Z8 X+ Y# j- PCIe, BIOS, ACPI experience would be an asset.
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- N4 @2 r" ]6 {  z) G, f- y+ I& @- Must be familiar with Design for verification Methodology (assertion based design strategies, code coverage, functional coverage, test plan, gate-level simulation, back-annotation etc.)
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- Should be familiar with ASIC design flow, such as synthesis, DFT, timing analysis, ECO etc.
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6 _+ L8 g2 Y/ G+ p- Must be familiar with shell/perl/tcl programming in linux OS.

+ \3 h9 l7 ~* ?2 [& l0 T- Should have strong problem solving skills

- Good English hearing, speaking, reading and writing capabilities.
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$ `8 a( h8 ?" V+ t# K* a1 k- Good communication skills
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( E% {6 N1 v! e) u) X- Will be a big plus if having mass production tape‐out experience.
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